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fix(proto): all varints should be backed by u64s over the wire

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xeon
2026-02-07 16:50:06 +03:00
parent 3be92b7b11
commit 69a95a1e24
1 changed files with 10 additions and 5 deletions
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15
proto/src/root.zig
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@@ -256,14 +256,19 @@ fn decodeField(r: *Io.Reader, allocator: Allocator, comptime T: type, wire_type:
}
fn readVarInt(r: *Io.Reader, comptime T: type) !T {
var shift: std.math.Log2Int(T) = 0;
var result: T = 0;
const int = @typeInfo(T).int;
var shift: std.math.Log2Int(u64) = 0;
var result: u64 = 0;
while (true) : (shift += 7) {
const byte = try r.takeByte();
result |= @as(T, @intCast(byte & 0x7F)) << shift;
if ((byte & 0x80) != 0x80) return result;
if (shift >= @bitSizeOf(T) - 7) return error.MalformedProtobuf;
result |= @as(u64, byte & 0x7F) << shift;
if ((byte & 0x80) != 0x80) return switch (int.signedness) {
.unsigned => @truncate(result),
.signed => @bitCast(@as(@Int(.unsigned, int.bits), @truncate(result))),
};
if (shift >= @bitSizeOf(u64) - 7) return error.MalformedProtobuf;
}
}